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74AC109-2001 数据手册 ( 数据表 )

零件编号产品描述 (功能)生产厂家
74AC109 Dual JK Positive Edge−Triggered Flip−Flop ON-Semiconductor
ON Semiconductor ON-Semiconductor
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The MC74AC109/74ACT109 consists of two high–speed completely independent transition clocked JK flip–flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip–flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J and K inputs together.
   Asynchronous Inputs:
      LOW input to SD (Set) sets Q to HIGH level
      LOW input to CD (Clear) sets Q to LOW level
      Clear and Set are independent of clock
      Simultaneous LOW on CD and SD makes both Q and Q HIGH
  
• Outputs Source/Sink 24 mA
• ′ACT109 Has TTL Compatible Inputs

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与其他制造商的搜索 '74AC109'

零件编号产品描述 (功能)PDF生产厂家
SN54LS109AJ DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP 视图 Motorola => Freescale
SN54LS109A DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP 视图 Motorola => Freescale
74F109 Dual JK Positive Edge-Triggered Flip-Flop 视图 Fairchild Semiconductor
DV74AC109 Dual JK Positive Edge-Triggered Flip-Flop 视图 AVG Semiconductors=>HITEK
74AC109 Dual JK positive edge-triggered flip-flop 视图 Motorola => Freescale
74AC109 Dual JK Positive Edge−Triggered Flip−Flop 视图 ON Semiconductor
HD74AC112 Dual JK Negative Edge-Triggered Flip-Flop 视图 Hitachi -> Renesas Electronics
74AC109 Dual JK Positive Edge-Triggered Flip-Flop 视图 Fairchild Semiconductor
DV74AC112 Dual JK Negative Edge-Triggered Flip-Flop 视图 AVG Semiconductors=>HITEK
MC74F112D DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP 视图 Motorola => Freescale

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