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74F113 数据手册 ( 数据表 )

零件编号产品描述 (功能)生产厂家
74F113 Dual JK Negative Edge-Triggered Flip-Flop Fairchild
Fairchild Semiconductor Fairchild
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General Description
The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered.
The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as long as minimum setup and hold times are observed.

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与其他制造商的搜索 '74F113'

零件编号产品描述 (功能)PDF生产厂家
HD74AC112 Dual JK Negative Edge-Triggered Flip-Flop 视图 Hitachi -> Renesas Electronics
DV74AC112 Dual JK Negative Edge-Triggered Flip-Flop 视图 AVG Semiconductors=>HITEK
MC74F112D DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP 视图 Motorola => Freescale
SN54LS107A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP 视图 Motorola => Freescale
MC74AC113 DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP 视图 Motorola => Freescale
MC74AC112 DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP 视图 Motorola => Freescale
74LS73 DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY 视图 Motorola => Freescale
SN54LS113A Dual JK negative edge-triggered flip-flop 视图 Motorola => Freescale
74LS112 Dual JK negative edge-triggered flip-flop 视图 Motorola => Freescale
SN54LS73 DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP 视图 Motorola => Freescale

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