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MC74AC112 数据手册 ( 数据表 )

零件编号产品描述 (功能)生产厂家
MC74AC112 DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP Motorola
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Dual JK Negative Edge-Triggered Flip-Flop

The MC74AC112/74ACT112 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
   LOW input to SD (Set) sets Q to HIGH level
   LOW input to CD (Clear) sets Q to LOW level
   Clear and Set are independent of clock
   Simultaneous LOW on CD and SD makes both Q and Q HIGH
  
• Outputs Source/Sink 24 mA
• ′ACT112 Has TTL Compatible Inputs

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与其他制造商的搜索 'MC74AC112'

零件编号产品描述 (功能)PDF生产厂家
HD74AC112 Dual JK Negative Edge-Triggered Flip-Flop 视图 Hitachi -> Renesas Electronics
DV74AC112 Dual JK Negative Edge-Triggered Flip-Flop 视图 AVG Semiconductors=>HITEK
74F113 Dual JK Negative Edge-Triggered Flip-Flop 视图 Fairchild Semiconductor
74F114 Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears 视图 Fairchild Semiconductor
74F112 Dual JK Negative Edge-Triggered Flip-Flop 视图 Fairchild Semiconductor
MC74AC109ML1 Dual JK Positive Edge-Triggered Flip-Flop 视图 ON Semiconductor
74HC73U Dual JK flip-flop with reset; negative-edge trigger 视图 Philips Electronics
74F109 Dual JK Positive Edge-Triggered Flip-Flop 视图 Fairchild Semiconductor
SN74LS109A Dual JK Positive Edge-Triggered Flip-Flop 视图 ON Semiconductor
74HC73 Dual JK flip-flop with reset; negative-edge trigger 视图 NXP Semiconductors.

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