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MC74F112D 数据手册 ( 数据表 )

零件编号产品描述 (功能)生产厂家
MC74F112D DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP Motorola
Motorola => Freescale Motorola
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The MC74F112 contains two independent, high-speed JK flip-flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J and K inputs can change when the clock is in either state without affecting the flip-flop, provided that they are in the desired state during the recommended setup and hold times relative to the falling edge of the clock. A LOW signal on SD or CD prevents clocking and forces Q or Q HIGH, respectively. Simultaneous LOW signals on SD and CD force both Q and Q HIGH.

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与其他制造商的搜索 'MC74F112D'

零件编号产品描述 (功能)PDF生产厂家
HD74AC112 Dual JK Negative Edge-Triggered Flip-Flop 视图 Hitachi -> Renesas Electronics
DV74AC112 Dual JK Negative Edge-Triggered Flip-Flop 视图 AVG Semiconductors=>HITEK
74F113 Dual JK Negative Edge-Triggered Flip-Flop 视图 Fairchild Semiconductor
74F114 Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears 视图 Fairchild Semiconductor
74F112 Dual JK Negative Edge-Triggered Flip-Flop 视图 Fairchild Semiconductor
MC74AC109ML1 Dual JK Positive Edge-Triggered Flip-Flop 视图 ON Semiconductor
74HC73U Dual JK flip-flop with reset; negative-edge trigger 视图 Philips Electronics
74F109 Dual JK Positive Edge-Triggered Flip-Flop 视图 Fairchild Semiconductor
SN74LS109A Dual JK Positive Edge-Triggered Flip-Flop 视图 ON Semiconductor
74HC73 Dual JK flip-flop with reset; negative-edge trigger 视图 NXP Semiconductors.

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