MC-4532CD647XFA
Synchronous Characteristics
Parameter
Symbol
Clock cycle time
/CAS latency = 3
/CAS latency = 2
Access time from CLK
/CAS latency = 3
/CAS latency = 2
CLK high level width
CLK low level width
Data-out hold time
Data-out low-impedance time
Data-out high-impedance time /CAS latency = 3
/CAS latency = 2
Data-in setup time
Data-in hold time
Address setup time
Address hold time
CKE setup time
CKE hold time
CKE setup time (Power down exit)
Command (/CS0 - /CS3, /RAS, /CAS, /WE,
DQMB0 - DQMB7) setup time
Command (/CS0 - /CS3, /RAS, /CAS, /WE,
DQMB0 - DQMB7) hold time
Note 1. Output load
tCK3
tCK2
tAC3
tAC2
tCH
tCL
tOH
tLZ
tHZ3
tHZ2
tDS
tDH
tAS
tAH
tCKS
tCKH
tCKSP
tCMS
tCMH
-A 75
Unit
MIN.
MAX.
7.5
(133 MHz)
ns
10
(100 MHz)
ns
5.4
ns
6.0
ns
2.5
ns
2.5
ns
3.0
ns
0
ns
3.0
5.4
ns
3.0
6.0
ns
1.5
ns
0.8
ns
1.5
ns
0.8
ns
1.5
ns
0.8
ns
1.5
ns
1.5
ns
0.8
ns
Output
Z = 50 Ω
50 pF
Note
1
1
1
Remark These specifications are applied to the monolithic device.
8
Data Sheet E0230N20 (Ver. 2.0)