NJW4302
Preliminary
• FG interfac for logic output device
The circuit below is a FG interface for logic output device (i.e. Hall IC and optical encoder). Two external
resistors are required to adjust the input voltage within the common mode input voltage range,0 to Vcc-1.5V.
FG interface for logic level input
5V
1.5k
logic
FG -
FG +
3.5k
0.1u
FGO
FG
for Internal logic
NJW4302
• Power supply generating from Vref
To supply for NJM4302, Hall sensor and Power stage, QR1 should have 100mA current capacity. It needs 47
microfarad capacitor on V+ of NJW4302 for ripple filtering.
• Hall sensor biasing
Hall biasing is determined by Hall signal amplitude. Hall signal amplitude must be larger than input sensitivity
of NJW4302.
• FG Input
Internal FG Amplifier is a differential amplifier which inputs and output are pin-outed. The DC gain of this
amplifier, AFG, is:
AFG
=
R7
R8
C8 is for noise reduction, C9 is for DC cut. Typical value of C10 is 0.1 microfarad. The inductor symbol
connected FGIN is FG sensing copper pattern on PC board.
• Power supply generating from Vref
To supply for NJM4302, Hall sensor and Power stage, QR1 should have 100mA current capacity. It needs 47
microfarad capacitor on V+ of NJW4302 for ripple filtering.
• Hall sensor biasing
Hall biasing is determined by Hall signal amplitude. Hall signal amplitude must be larger than input sensitivity
of NJW4302.
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