TEA6415C
IN / OUT PIN CONFIGURATION (continued)
Figure 4 : Bus I/O Configuration
VCC
P ins
2-4-7
VRE F
to I2L
pa rt
*
Figure 5 : VCC Pin Configuration
VCC
9
ACK * For Pin 2
(DATA) only
20kΩ
150 Ω
USE WITH AN OTHER TEA6415C
The programmation input (PROG) permits to oper-
ate with two TEA6415C in parallel and to select
them independantly through the I2C-BUS without
Figure 6
modifying the adress byte. Consequentl y, the
switch capabilities are doubled or IC1 and IC2 can
be cascaded.
PROG
µP
logical ”0”
IC1
Video
Inputs
Video
Outputs
logical ”1”
Video
Inputs
PROG
IC2
Video
Outputs
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