RF2413
VDD
CMOS
100 nF 33 pF
1
POWER
2 CONTROL
POWER
DOWN
3
100 nF
Q INPUT
4
1 µF
470 Ω
VREF
5
470 Ω
470 Ω
Σ
6
5
100 nF
470 Ω
Q INPUT
7
GAIN
CONTROL 1
GAIN
CONTROL 2
LO 1
INPUT
Note 3
50 Ω µstrip
1 nF
8
9
-45°
+45°
10
56 Ω
33 pF
20
50 Ω µstrip
19
18
50 Ω µstrip
17
Note 1
56 Ω
16
15
14
13
Note 2
12
11
RF OUTPUT
LO 2 INPUT
NOTE 1:
Optional; High input impedance without resistor. SMD
resistor mounted adjacent to package pin, grounded through
via to the ground plane.
NOTE 2: If no IF filter is needed, tie pins 11, 12, 14, and 15 as shown.
Otherwise insert the filter and the matching network.
NOTE 3: Gain control pins (8 and 9) may be tied together directly.
5-24
Rev B3 990419