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零件编号
产品描述 (功能)
DM74AS651NT 查看數據表(PDF) - Fairchild Semiconductor
零件编号
产品描述 (功能)
生产厂家
DM74AS651NT
Octal Bus Transceiver and Register
Fairchild Semiconductor
DM74AS651NT Datasheet PDF : 8 Pages
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DM74AS651 Switching Characteristics
Symbol
Parameter
Conditions
From
To
Min
f
MAX
t
PLH
t
PHL
Maximum Clock Frequency
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
V
CC
=
4.5V to 5.5V
R
1
=
R
2
=
500
Ω
C
L
=
50 pF
90
2
CBA or CAB
A or B
2
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
A or B
2
B or A
1
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
2
SBA or SAB A or B
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
(Note 4)
2
t
PZH
Output Enable Time
2
to HIGH Level Output
t
PZL
Output Enable Time
to LOW Level Output
3
Enable GBA A
t
PHZ
Output Disable Time
2
from HIGH Level Output
t
PLZ
Output Disable Time
2
from LOW Level Output
t
PZH
Output Disable Time
3
to HIGH Level Output
t
PZL
Output Disable Time
to LOW Level Output
t
PHZ
Output Disable Time
from HIGH Level Output
3
Enable GAB B
2
t
PLZ
Output Disable Time
2
from LOW Level Output
Note 4:
These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
Max
8.5
Units
MHz
ns
9
ns
8
ns
7
ns
11
ns
9
ns
10
ns
16
ns
9
ns
9
ns
11
ns
16
ns
10
ns
11
ns
5
www.fairchildsemi.com
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