X76F128H-2.7 查看數據表（PDF） - Xicor -> Intersil

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X76F128H-2.7

Secure SerialFlash

Xicor -> Intersil 

X76F128

CS Timing Diagram (Selecting/Deselecting the Part)

SCL

CS

from

master

tSU:CS

RST Timing Diagram – Response to a Synchronous Reset

tSR

CS

RST

tNOL

CLK

I/O

tRST

1st

clk

pulse

tRDV

tNOL

tSU:RST

tHIGH_RST

2nd

clk

pulse

tCDV

DATA BIT (1)

tHD:CS

tLOW_RST

3rd

clk

pulse

DATA BIT (2)

7052 FM 20

CS

RST

CLK

I/O

DATA BIT (N)

DATA BIT (N+1)

tDHZ

(N+2)

GUIDELINES FOR CALCULATING TYPICAL VALUES OF BUS PULL UP RESISTORS

100

80

60

RMAX

40

20 RMIN

20 40 60 80 100

Bus capacitance in pF

RMIN = V---I---OC----CL----MM-----IA-N---X--- = 1.8KΩ

RMAX = -C----B-t---R-U-----S--

tR = maximum allowable SDA rise time

13

7052 FM 21

7052 FM 22

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