L6000 查看數據表（PDF） - STMicroelectronics
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L6000 Datasheet PDF : 24 Pages
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L6000
DATA SEPARATOR DYNAMIC CHARACTERISTICS AND TIMING (Continued)
Symbol
Parameter
TAS, TAH AMD Set Up and Hold Time
TPAMD AMD Propagation Delay
TD
1/3 Cell Delay
Write Mode
TW D
Write Data Pulse Width
TRWD
TFWD
TRWC
TFWC
TSNRZ
THNRZ
TPC
Write Data Rise Time
Write Data Fall Time
Write Data Clock Rise Time
Write Data Clock Fall Time
NRZ Set Up Time
NRZ Hold Time
Precompensation Time Shift
Magnitude Accuracy
Test Condition
Min. Typ. Max. Unit
(**)
13
–
ns
(**)
–
±15
ns
TD = 1/FSOUT,RR = 39KΩ (***) 0.8TD
1.2TD ns
1.5V
CL ≤ 15pF
0.8V to 2.0V, CL ≤ 15pF
2.0V to 0.8V, CL ≤ 15pF
0.8V to 2.0V, CL ≤ 15pF
2.0V to 0.8V, CL ≤ 15pF
TPCO = 0.04TREF
TPC(max) = 0.28TREF
TPC = nTPCO n =0
2TFout/3
–5
–
–
–
–
5
5
– 0.5
2TFout/3 ns
+5
9
ns
5
ns
10
ns
8
ns
–
ns
–
ns
ns
+ 0.5
Data Synchronization
TVCO VCO Center Frequency Period
KVCO
VCO Frequency Dynamic range
VCO Control Gain
KD
Phase Detector Gain
KVCO x KD Product Accuracy
1≤n≤7
n(0.8TPCO)
– 0.5
FLTR2-FLTR2 = 0
TO = (8.95 + 0.786 x DR)-1,
RR = 39kΩ (***)
0.9TO
–1.5 ≤ FLTR-FLTR2 ≤ +1.5 (***) ±25
ωo
=
2Π
TVCO
–1.5 ≤ FLTR-FLTR2 ≤ +1.5
0.14Wo
Read: KD = 0.7 + 0.43 x DR, 0.83KD
PLL REF = RD 3T Pattern, Non-
Read: KD = 0.7 + 0.43 x DR,
PLLREF = Fout / 2 (***)
– 28
VCO Phase Restart Error
–
Decode Window Cent. Accuracy
Decode Window Width
–
2TORC/3
- 1.5
SERIAL PORT TIMING
n(1.2TPCO)
+0.5
ns
1.1TO ns
±45
%
0.26Wo rad/(Vxs)
1.17KD A/rad
+ 28
%
4
ns
±1.5
ns
–
ns
Symbol
Tc
Tck1
TcKh
Tsens
Tsenh
Parameter
SERIAL CLOCK+ Data Clock Period
SERIAL CLOCK+ Low Time
SERIAL CLOCK+ High Time
Enable to Clock Delay Time
Clock to Disable Delay Time
Tds
Tdh
Tdskewl
Data Setup Time
Data Hold Time
Clock to Valid Data Delay Time
Tdskewe End of Valid Data to Clock
Tsendl Time to Tri-stated SERIAL DATA I/O
Tturnd
Tsl
SERIAL DATA I/O Turnaround Time
SERIAL ENABLE Low Time
Test Condition
Delay from SERIAL
CLOCK+ falling edge
Delay from SERIAL
CLOCK+ falling edge
Delay from falling edge
of SERIAL ENABLE
Min. Typ. Max. Unit
100
–
ns
40
–
ns
40
–
ns
35
–
ns
100
–
ns
15
–
ns
15
–
ns
–
27
ns
–
0
ns
–
50
ns
70
–
ns
200
–
ns
(**) Bench test only. (***) Preliminary data.
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