PIC18F010T-I/SN 查看數據表（PDF） - Microchip Technology

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PIC18F010T-I/SN

High Performance Microcontrollers

Microchip Technology 

PIC18F010/020

2.6.1 OSCILLATOR TRANSITIONS

The PIC18F010/020 devices contain circuitry to pre-

vent "glitches" when switching between oscillator

sources. Essentially, the circuitry waits for eight rising

edges of the clock source that the processor is switch-

ing to. This ensures that the new clock source is stable

and that its pulse width will not be less than the shortest

pulse width of the two clock sources.

A timing diagram, indicating the transition from the inter-

nal oscillator to the external crystal is shown in Figure 2-6.

The internal oscillator is assumed to be running all the

time. After the OST bit is set, the processor is frozen at

the next occurring Q1 cycle. After eight synchronization

cycles are counted from the external oscillator, opera-

tion resumes. No additional delays are required after

the synchronization cycles.

FIGURE 2-6:

TIMING DIAGRAM FOR TRANSITION FROM EXTERNAL OSCILLATOR TO

INTERNAL OSCILLATOR

Q1 Q2 Q3 Q4

INTOSC

OSC1

TOSC

Internal

System

Clock

OSTO

(OSCCON<0>)

Program

PC

Counter

Q1

1

2

3

4

5

6

7

8

Q2 Q3 Q4

Q1 Q2

Q3 Q4 Q1

PC + 2

PC + 4

Note 1: Delay on internal system clock is eight oscillator cycles for synchronization.

FIGURE 2-7:

INTOSC

OSC1

OSC2

Internal System

Clock

SCS

(OSCCON<0>)

TIMING FOR TRANSITION BETWEEN INTERNAL OSCILLATOR AND OSC1 (EC)

Q3

Q4

Q1

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

TOSC

12 34 5 6 7 8

Program Counter

PC

Note 1: Internal oscillator mode assumed.

PC + 2

PC + 4

 2001 Microchip Technology Inc.

Preliminary

DS41142A-page 11

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