TE28F004B3TA100 查看數據表（PDF） - Intel
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TE28F004B3TA100 Datasheet PDF : 58 Pages
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28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
AC Characteristics, Continued
Density
32 Mbit
#
Sym
Para-
meter
Product
70 ns
90 ns
100 ns
110 ns
Unit
VCC 2.7 V–3.6 V 2.7 V–3.6 V 3.0 V–3.3 V 2.7 V–3.3 V 3.0 V–3.3 V 2.7 V–3.3 V
Min Max Min Max Min Max Min Max Min Max Min Max
R1 tAVAV Read Cycle Time
R2
tAVQV
Address to Output
Delay
R3
tELQV
CE# to Output
Delay(1)
R4
tGLQV
OE# to Output
Delay(1)
R5
tPHQV
RP# to Output
Delay
R6
tELQX
CE# to Output in
Low Z(2)
R7
tGLQX
OE# to Output in
Low Z(2)
R8
tEHQZ
CE# to Output in
High Z(2)
R9
tGHQZ
OE# to Output in
High Z(2)
Output Hold from
Address, CE#, or
R10 tOH OE# Change,
Whichever Occurs
First(2)
70
90
90
100
100
110
ns
70
90
90
100
100
110 ns
70
90
90
100
100
110 ns
20
20
30
30
30
30 ns
150
150
600
600
600
600 ns
0
0
0
0
0
0
ns
0
0
0
0
0
0
ns
20
20
25
25
25
25 ns
20
20
25
25
25
25 ns
0
0
0
0
0
0
ns
NOTES:
1. OE# may be delayed up to tELQV–tGLQV after the falling edge of CE# without impact on tELQV.
2. Sampled, but not 100% tested.
See Figure 7, “AC Waveform: Read Operations” on page 26.
See Figure 5, “Input/Output Reference Waveform” on page 22 for timing measurements and maximum
allowable input slew rate.
3UHOLPLQDU\
25
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