TQ8106S 查看數據表（PDF） - TriQuint Semiconductor
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TQ8106S Datasheet PDF : 19 Pages
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TQ8105/TQ8106
PRELIMINARY DATA SHEET
Table 3. Mode Selection
Signals
LBM(1:0)
PH(1:0)
MMS
CKSRC(2:0)
OOF
NSOL
OC3
NRESET
NCDREN
Mode
Loopback: 00 = Normal, 01 = Equipment, 10 = Facility, 11 = Split
00 = 0 degrees delay, 01 = 90 degrees delay, 10 = 180 degrees delay, 11 = 270 degrees delay
1 = Master (use REFCKT/E as reference), 0 = Slave (use receive clock as reference)
Clock Source:
000 = PLL bypass
001 = 51.84 MHz PLL reference, SONETCK & SDHCK tristate
010 = 155.52 MHz PLL reference
011 = 51.84 MHz PLL reference, SONETCK=8, SDHCK derived from receiver timing
100 = 77.76 MHz PLL reference
101 = 51.84 MHz PLL reference
110 = 38.88 MHz PLL reference
111 = 19.44 MHz PLL reference
1 = Initiate frame search, 0 = Do not permit reframing (see FRPWR pin in Table 1)
1 = Pass receive data, 0 = Force receive data to 0
1 = Operate at STM1/STS-3 (or PLL bypass divided by 4), 0 = Operate at STM4/STS-12/PLL bypass
1 = Normal operation, 0 = Reset internal counters
1 = TQ8105/CDR Off mode, 0 = Enable CDR (TQ8106 only)
Table 4. Absolute Maximum Ratings
Parameter
Positive supply
Negative supply (VPP = 0 V)
Output voltage
Output current
Input voltage
Input current
Output voltage
Output current
Input voltage
Input current
Biased junction temperature
Storage temperature
Symbol
VCC, VPP, VDD, AVDD
VNN
VO
IO
VI
II
VO
IO
VI
II
TJ
TS
Level
Minimum
Maximum
Unit
GND
7
V
–7
GND
V
ECL/PECL
VNN–0.5
VPP+0.5
V
ECL/PECL
—
40
mA
ECL/PECL
VNN–0.5
VPP+0.5
V
ECL/PECL
–1
1
mA
TTL
–0.5
VCC+0.5
V
TTL
—
100
mA
TTL
–0.5
VCC+0.5
V
TTL
–1
1
mA
—
–55
+150
°C
—
–65
+150
°C
12
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