FSD_CHIPSET_B/0104VP2
CHIP SET INTERFACE SPECIFICATION
DIFFERENCES BETWEEN:
FSD_CHIPSET_B/0006VP1 AND FSD_CHIPSET_B/0104VP2
DESCRIPTION OF THE MODIFICATION
Definition modification of the signal Tx-start
Modification of the figure 4
PARAGRAPH ON VP2
Chapter 1.2.2 "Interface signals definition", page 2
Chapter 1.7 "FPGA pin-out & Chip Set Block Diagram", page 8
Note: other modifications which are only editorial are not described in this table.
i/iv
i