VITESSE
SEMICONDUCTOR CORPORATION
STS-48c Physical Layer
Packet/ATM Over SONET/SDH Device
Datasheet
VSC9112
Absolute Maximum Ratings(1)
Power Supply Voltage (VDD) Potential to GND .................................................................................-0.5V to +4V
Power Supply Voltage (VDD5) Potential to GND................................................................................-0.5V to +6V
DC Input Voltage (PECL inputs)........................................................................................... -0.5V to VDD + 0.5V
DC Input Voltage (TTL inputs) ............................................................................................-0.5V to VDD5 + 0.5V
DC Output Voltage (TTL Outputs)........................................................................................ -0.5V to VDD + 0.5V
DC Output Voltage (TTL 5V Tolerant Outputs) ..................................................................-0.5V to VDD5 + 0.5V
Output Current (TTL Outputs) ................................................................................................................. +/-50mA
Output Current (PECL Outputs)................................................................................................................+/-50mA
Case Temperature Under Bias .........................................................................................................-55o to +125oC
Storage Temperature..................................................................................................................... -65oC to +150oC
Maximum Input ESD (Human Body Model).............................................................................................. 2000 V
Note: Caution: Stresses listed under “Absolute Maximummanent damage. Functionality at or exceeding the values listedods
may affect device reliability.
Recommended Operating Conditions
Power Supply Voltage (VDD) ............................................................................................................... +3.3V ±10 %
Power Supply Voltage (VDD5)............................................................................................................. +5.0V±10 %
Operating Temperature Range* (T).................................................................................................... -40o to 95oC
* Lower limit of specification is ambient temperature and upper limit is case temperature.
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© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52210-0, Rev. 4.3
3/30/00