CXD2492R 查看數據表（PDF） - Sony Semiconductor

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CXD2492R

Timing Generator for Frame Readout CCD Image Sensor

Sony Semiconductor 

CXD2492R

VD

V1A

SUB

WEN

SMD

SVD

SHD

SHD

SVD

01

002h

10Fh

01

000h

050h

Further, SPL can be used during this mode to specify the SUB output at the desired vertical period during the

low-speed shutter period.

In the case below, SUB is output based on SHD at the SPL vertical period out of (SVD + 1) vertical periods.

VD

V1A

SUB

WEN

SMD

SPL

SVD

SHD

SPL

SHD

SVD

10

001h

002h

10Fh

01

000h

000h

0A3h

Incidentally, SPL is counted as "000h", "001h", "002h" and so on in conformance with SVD.

Using this function it is possible to achieve smooth exposure time transitions when changing from low-speed

shutter to high-speed shutter or vice versa.

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