M74HCT10(1993) 查看數據表（PDF） - STMicroelectronics

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M74HCT10
(Rev.:1993)

TRIPLE 3-INPUT NAND GATE

STMicroelectronics 

M54HCT10

M74HCT10

. HIGH SPEED

tPD = 11 ns (TYP.) AT VCC = 5 V

. LOW POWER DISSIPATION

ICC = 1 µA (MAX.) AT TA = 25 °C

. COMPATIBLE WITH TTL OUTPUTS

VIH = 2V (MIN.) VIL = 0.8V (MAX)

. OUTPUT DRIVE CAPABILITY

10 LSTTL LOADS

. SYMMETRICAL OUTPUT IMPEDANCE

IOH = IOL = 4 mA (MIN.)

. BALANCED PROPAGATION DELAYS

tPLH = tPHL

. PIN AND FUNCTION COMPATIBLE WITH

54/74LS10

DESCRIPTION

The M54/74HCT10 is a high speed CMOS TRIPLE

3-INPUT NAND GATE fabricated with silicon gate

C2MOS technology. It has the same high speed per-

formance of LSTTL combined with true CMOS low

power consumption. The internal circuit is com-

posed of 3 stages including buffer output, which en-

ables high noise immunity and stable output. All

inputs are equipped with protection circuits against

static discharge and transient excess voltage.

This integrated circuit has input and output charac-

teristics that are fully compatible with 54/74 LSTTL

logic families. M54/74HCT devices are designed to

directly interface HSC2MOS systems with TTL and

NMOS components. They are also plug in replace-

ments for LSTTL devices giving a reduction of

power consumption.

INPUT AND OUTPUT EQUIVALENT CIRCUIT

TRIPLE 3-INPUT NAND GATE

B1R

(Plastic Package)

F1R

(Ceramic Package)

M 1R

(Micro Package)

C1R

(Chip Carrier)

ORDER CODES :

M54HCT10F1R

M74HCT10M1R

M74HCT10B1R

M 74H CT 1 0C 1R

PIN CONNECTIONS (top view)

February 1993

NC =

No Internal

Connection

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