ISP1581 查看數據表（PDF） - Philips Electronics

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ISP1581

Universal serial bus 2.0 high-speed interface device

Philips Electronics 

Philips Semiconductors

ISP1581

USB 2.0 HS interface device

9.1 Register access

Register access depends on the bus width used:

• 8-bit bus: multi-byte registers are accessed lower byte (LSByte) first.

• 16-bit bus: for single-byte registers the upper byte (MSByte) must be ignored.

Endpoint specific registers are indexed via the Endpoint Index register. The target

endpoint must be selected first, before accessing the following registers:

• Buffer Length

• Control Function

• Data Port

• Endpoint MaxPacketsize

• Endpoint Type

• Short Packet.

Remark: All reserved bits are not implemented. The bus and bus reset values are not

defined. Therefore, writing to these reserved bits will have no effect.

9.2 Initialization registers

9.2.1 Address register (address: 00H)

This register is used to set the USB assigned address and enable the USB device.

Table 5 shows the Address register bit allocation.

The DEVEN and DEVADDR bits will be cleared whenever a bus reset, a power-on

reset or a soft reset occurs.

In response to the standard USB request SET_ADDRESS, the firmware must write

the (enabled) device address to the Address register, followed by sending an empty

packet to the host. The new device address is activated when the host acknowledges

the empty packet.

Table 5: Address register: bit allocation

Bit

7

6

5

4

3

2

1

0

Symbol

DEVEN

DEVADDR[6:0]

Reset

0

00H

Bus reset

0

00H

Access

R/W

R/W

Table 6:

Bit

7

6 to 0

Endpoint Configuration register: bit description

Symbol

Description

DEVEN

A logic 1 enables the device.

DEVADDR[6:0] This field specifies the USB device address.

9397 750 09665

Product data

Rev. 04 — 18 July 2002

© Koninklijke Philips Electronics N.V. 2002. All rights reserved.

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