RT9921PQV 查看數據表（PDF） - Richtek Technology

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RT9921PQV

Integrated Multi-Channel DC-DC Converter for TFT LCD Panels

Richtek Technology 

Preliminary

RT9921

GPM

The GPM is controlled by the frame signals from timing

controller to modulate the Gate-On voltage, VGHM, which

acts a flicker compensation circuit to reduce the coupling

effect between gate lines and pixels. It also can delay the

Gate-On voltage while power-on for achieving a correct

power-on sequence for gate driver ICs. Both of the power-

on delay time and the falling time of the Gate-On voltage

are programmable by external capacitor and resistor.

VIN

VLDO

AVDD

VGH

PGOOD

VDPM

VFLK

VGHM

Power on delay time

is controlled by CDPM

VREF

VGH

The falling time can

be adjusted by R1

Figure 1

Operational Amplifier

The function of the operational amplifier is to drive the

LCD backplane VCOM. The operational amplifier features

+/- 140mA output short circuit current, 12V/μs slew rate,

and 12MHz bandwidth. An internal short-circuit protection

circuit is implemented to protect the device from output

short circuit. The operational amplifier limits the short

circuit current while the output is directly shorted.

LDO

The low-dropout linear regulator (LDO) can supply up to

350mA current while the input voltage is 3.3V. It uses an

internal PMOS as the pass device. The output current

limitation is 500mA and It is suitable for the supply voltage

to be the T-CON ASIC.

Voltage Detector

The voltage detector monitors the VDIV voltage to generate

a reset signal while VDIV is lower than the detecting level

and the detecting level is decided by an external resistor

divider.

DS9921-00 November 2007

VDET = VDIV (1+R6/R7) = 1.24V x (1+R6/R7)

VHYS = 50mV (1+R6/R7)

The delay time is programmable by an external capacitor

(C10) as equation. For example, setting C10 = 100nF can

generate a 12ms delay for reset signal.

tD = 120k x C10

VDI

VHYS

VDET+VHYS Release Voltage

VDET Detecting Voltage

Min Operating Voltage

GND

RESET

GND

tD

Figure 2

Layout Guideline

http://www.DataSheet4U.net/

For high frequency switching power supplies, the PCB

layout is important to get good regulation, high efficiency

and stability. The following descriptions are the guidelines

for better PCB layout.

z For good regulation, placing the power components as

close as possible. The traces should be wide and short

enough especially for the high-current output loop.

z The feedback voltage-divider resistors must near the

feedback pin. The divider center trace must be shorter

and avoid the trace near any switching nodes.

z The compensation circuit should be kept away from

the power loops and should be shielded with a ground

trace to prevent any noise coupling.

z Minimize the size of the Lx node and keep it wide and

shorter. Keep the Lx node away from the FB and analog

ground.

z The power ground (PGND) consists of input and output

capacitor grounds, the components's ground of charge

pump and GPM. The PGND should be wide and short

enough to connect to a ground plane.

www.richtek.com

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datasheet pdf - http://www.DataSheet4U.net/

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