MAX1772 查看數據表（PDF） - Maxim Integrated
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MAX1772 Datasheet PDF : 20 Pages
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Low-Cost, Multichemistry Battery-
Charger Building Block
ABSOLUTE MAXIMUM RATINGS
DCIN, CSSP, CSSN to GND ...................................-0.3V to +30V
BST to GND ............................................................-0.3V to +36V
BST to LX..................................................................-0.3V to +6V
DHI to LX ...................................................-0.3V to (VBST + 0.3V)
LX to GND .................................................................-6V to +30V
BATT, CSIP, CSIN to GND........................................-0.3V to 20V
CSIP to CSIN or CSSP to CSSN or
PGND to GND ...........……….……………..…….-0.3V to +0.3V
CCI, CCS, CCV, DLO, ICHG, IINP,
ACIN, REF to GND ...............................-0.3V to (VLDO + 0.3V)
DLOV, VCTL, ICTL, REFIN, CELLS,
CLS, LDO, ACOK to GND ....................................-0.3V to +6V
DLOV to LDO.........................................................-0.3V to +0.3V
DLO to PGND .........................................-0.3V to (VDLOV + 0.3V)
LDO Short-Circuit Current ..................................................50mA
Continuous Power Dissipation (TA = +70°C)
28-Pin QSOP (derate 12.6mW/°C above +70°C).......1008mW
Junction-to-Ambient Thermal Resistance (θJA)
(Note 1) .....................................................................79.3°C/W
Junction-to-Case Thermal Resistance ( θJC)
(Note 1) ........................................................................27°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ........................................................150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VREFIN = 3.0V, VVCTL = VICTL = 0.75 VREFIN, VCELLS = 2.0V,
VACIN = 0V, CLS = REF, VBST - VLX = 4.5V, VGND = VPGND = 0V, CLDO = 1µF, LDO = DLOV, CREF = 1µF; pins CCI, CCS, and CCV
are compensated per Figure 1a; TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
SUPPLY AND LDO REGULATOR
DCIN Input Voltage Range
VDCIN
DCIN Undervoltage Lockout
Trip Point
DCIN Quiescent Current
LDO Output Voltage
LDO Load Regulation
IDCIN
LDO Undervoltage Lockout
Trip Point
REF Output Voltage
CONDITIONS
VDCIN falling
VDCIN rising
8.0V < VDCIN < 28V
8.0V < VDCIN < 28V, no load
0 < ILDO < 10mA
VDCIN = 8.0V
0 < IREF < 500µA
MIN TYP MAX UNITS
8
28
V
7.0
7.4
V
7.5 7.85
2.7
6.0
mA
5.25 5.40 5.55
V
34
100
mV
3.20 4.00 5.15
V
4.072 4.096 4.120
V
REF Undervoltage Lockout
Trip Point
VREF falling
3.1
3.9
V
TRIP POINTS
BATT POWER_FAIL Threshold
BATT POWER_FAIL Threshold
Hysteresis
VCSSP falling
50
100 150
mV
100 200 300
mV
ACIN Threshold
ACIN Threshold Hysteresis
ACIN Input Bias Current
CLS Input Range
CLS Input Bias Current
SWITCHING REGULATOR
Minimum Off-Time
VACIN rising
0.5% of VREF
VACIN = 2.048V
VCLS = 2.0V
VBATT =16.8V
2.007 2.048 2.089
V
10
20
30
mV
-1
+1
µA
1.6
REF
V
-1
+1
µA
1.00 1.25 1.50
µs
2 _______________________________________________________________________________________
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