TDA936X 查看數據表（PDF） - Philips Electronics

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TDA936X

TV signal processor-Teletext decoder with embedded µ-Controller

Philips Electronics 

Philips Semiconductors

TV signal processor-Teletext decoder with

embedded µ-Controller

Preliminary specification

TDA 935X/6X/8X series

handbook, full pagewidthMEMORY

PROGRAM ROM

CHARACTER ROM

PACKET 26 ROM

SECURITY BITS SET

USER ROM PROGRAMMING

VERIFY

(ENABLE/DISABLE)

(ENABLE/DISABLE)

ENABLED

ENABLED

ENABLED

ENABLED

ENABLED

ENABLED

MBK955

Figure 8 Security bits for production blank devices

RAM ORGANISATION

The Internal Data RAM is organised into two areas, Data Memory and Special Function Registers (SFR’s) as

shown in Figure 9.

Data Memory

The Data memory is 256 x 8 bits wide (byte) and occupies the address range 00h to 255h when using indirect

addressing and 00h to 127h when using Direct addressing. The SFRs occupy the address range 128 to 255 and

are accessible using Direct addressing only.

FFH

Upper

128

80H

7FH

Lower

128

Accessible

by Indirect

Addressing

only

Accessible

by Direct

and Indirect

Addressing

00H

Data Memory

Accessible

by Direct

Addressing

only

Special Function Registers

Figure 9 Internal Data Memory

The lower 128 Bytes of Data memory are mapped as shown in Figure 10. The lowest 24 bytes are grouped into

4 banks of 8 registers, the next 16 bytes above the register banks form a block of bit addressable memory space.

1999 Sep 28

14

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