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39SF512 查看數據表(PDF) - Silicon Storage Technology

零件编号
产品描述 (功能)
生产厂家
39SF512
SST
Silicon Storage Technology SST
39SF512 Datasheet PDF : 22 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
512 Kbit Multi-Purpose Flash
SST39SF512
AC CHARACTERISTICS
Data Sheet
TABLE 9: READ CYCLE TIMING PARAMETERS VDD = 4.5-5.5V
SST39SF512-70
Symbol Parameter
Min
Max
Units
TRC
Read Cycle Time
70
ns
TCE
Chip Enable Access Time
70
ns
TAA
Address Access Time
70
ns
TOE
Output Enable Access Time
35
ns
TCLZ1
TOLZ1
CE# Low to Active Output
OE# Low to Active Output
0
ns
0
ns
TCHZ1 CE# High to High-Z Output
25
ns
TOHZ1
TOH1
OE# High to High-Z Output
Output Hold from Address Change
25
ns
0
ns
T9.5 1149
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 10: PROGRAM/ERASE CYCLE TIMING PARAMETERS
Symbol Parameter
Min
Max
Units
TBP
Byte-Program Time
TAS
Address Setup Time
TAH
Address Hold Time
30
µs
0
ns
30
ns
TCS
TCH
TOES
WE# and CE# Setup Time
WE# and CE# Hold Time
OE# High Setup Time
0
ns
0
ns
0
ns
TOEH
TCP
TWP
TWPH1
TCPH1
TDS
TDH1
TIDA1
TSE
OE# High Hold Time
CE# Pulse Width
WE# Pulse Width
WE# Pulse Width High
CE# Pulse Width High
Data Setup Time
Data Hold Time
Software ID Access and Exit Time
Sector-Erase
10
ns
40
ns
40
ns
30
ns
30
ns
30
ns
0
ns
150
ns
10
ms
TSCE
Chip-Erase
20
ms
T10.1 1149
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2003 Silicon Storage Technology, Inc.
9
S71149-05-000
11/03

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