RA8806 查看數據表（PDF） - RAIO
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RA8806 Datasheet PDF : 174 Pages
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Preliminary Version 1.0
RA8806
Two Layers Character/Graphic LCD Controller
Set Display On/Off Selection
The bit is used to control LCD Driver Interface signal – “DISP_OFF”.
2
0 : DISP_OFF pin output low(Display Off).
1 : DISP_OFF pin output high(Display On).
Blink Mode Selection
1 0 : Normal Display.
1 : Blink Full Screen. The blink time is set by register BTMR.
Inverse Mode Selection
0 0 : Normal Display.
1 : Inverse Full Screen. It will cause the display inversed.
0
R/W
0
R/W
0
R/W
REG [01h] Misc. Register (MISC)
Bit
Description
Default
Eliminating Flicker
7 1 : Eliminating flicker mode, scan will auto-pending when busy.
0
0 : Normal mode.
Clock Output (Pin CLK_OUT) Control
6
1 : The pin “CLK_OUT” indicates the SLEEP state of Status Register(0:
Normal Mode, 1: Sleep Mode).
0
0 : The pin “CLK_OUT” is the output of Internal system clock.
Busy Polarity (for “BUSY” pin)
5 1 : Set Active High.
0
0 : Set Active Low.
Interrupt Polarity (for “INT” pin)
4 1 : Set Active High.
0
0 : Set Active Low.
Driver Clock Selection
These two bits are used to select the clock frequency of XCK.
0 0 : XCK = CLK/8
3-2 0 1 : XCK = CLK/4 (Default)
01
1 0 : XCK = CLK/2
1 1 : XCK = CLK
The “CLK” means system clock.
SEG Scan Direction(SDIR)
1 0 : SEG order is 0 ~ 319.
0
1 : SEG order is 319 ~ 0.
COM Scan Direction(CDIR)
0 0 : COM order 0 ~ 239.
0
1 : COM order 239 ~ 0.
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
REG [03h] Advance Display Setup Register (ADSR)
Bit
Description
Default
7 Scroll Function Pending
1 : Scroll function pending
0 : Scroll function keep active
0
Note: When SCR_HV(Bit-1) and SCR_EN(Bit-0) are changed, the
function does not support.
Access
R/W
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