FDC37N958FR 查看數據表（PDF） - SMSC -> Microchip

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FDC37N958FR

Notebook I/O Controller with Enhanced Keyboard and System Control

SMSC -> Microchip 

Pin

Number

139

20

206

207

208

52

53

101

23

22

Function

Default

GPIO15

GPIO16

GPIO17

GPIO18

GPIO19

GPIO20

GPIO21

SIRQ

KSO12

KSO13

Alternate

nRI2

MID1

GATEA20

nDACK2 (note1)

nDACK3 (note1)

PS2CLK |

8051RX

PS2DAT |

8051TX

IRQ3 (UA1)

OUT8

GPIO18

I/O Type

Default

I/O8

IS/O8

I/O8

I/O8

I/O8

I/OD24

I/OD24

O8

OD4

OD4

Alternate

I

IS

O8

I

I

I/OD24 | I

I/OD24 |

OD24

O8

OD4

OD4

Mux

Control

MISC8

MISC6

MISC17

MISC11

MISC1 +

MISC3

MISC0

MISC17 + 6

MISC17

VCC

Plane

VCC2

VCC1

Note 1: With the inclusion of Fast IR two additional DMA channels are provided.

Note 2: When GPIO6, GPIO9, GPIO10 and/or GPIO12 are configured as IR_MODE, COM-

TX, nRTS2|IR_MODE, and/or nDTR2 respectively and POWERGOOD=0 (VCC2 low)

then these pins will tri-state to prevent back-biasing of external circuitry.

The Mux Control Column in Table 2 lists the Misc Bits which the 8051 has access to through the three

Multiplexing registers. See the 8051 section of this data sheet for a description of the Multiplexing

registers.

SMSC DS – FDC37N958FR

Page 11

Rev. 09/01/99

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