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ADJD-J823 查看數據表(PDF) - Avago Technologies

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ADJD-J823 Datasheet PDF : 18 Pages
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Acknowledge/Not acknowledge
The receiver must always acknowledge each byte sent in a data transfer. In the case of the slave-receiver and master-
transmitter, if the slave-receiver does not send an acknowledge bit, the master-transmitter can either STOP the transfer
or generate a repeated START to start a new transfer.
SDA
(SLAVE-RECEIVER)
SDA pulled LOW
by receiver
Acknowledge
SDA
(MASTER-TRANSMITTER)
LSB
SDA left HIGH
by transmitter
SCL
(MASTER)
Figure 6. Slave-Receiver Acknowledge
8
9
Acknowledge
clock pulse
In the case of the master-receiver and slave-transmitter, the master generates a not acknowledge to signal the end
of the data transfer to the slave-transmitter. The master can then send a STOP or repeated START condition to begin
a new data transfer.
In all cases, the master generates the acknowledge or not acknowledge SCL clock pulse.
SDA
(SLAVE-TRANSMITTER)
SDA
(MASTER-RECEIVER)
SCL
(MASTER)
Figure 7. Master-Receiver Acknowledge
LSB
SDA left HIGH
by receiver
8
SDA left HIGH
by transmitter
Not
acknowledge
9
Acknowledge
clock pulse
P
Sr
STOP or repeated
START condition
13

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