AS8228BLQW 查看數據表（PDF） - austriamicrosystems AG

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AS8228BLQW

Highly Integrated Single Phase 2-Current Energy Metering Integrated Circuits with Microcontroller, RTC, Programmable Multi-Purpose I/Os and LCD Driver

austriamicrosystems AG 

Data Sheet AS8218 / AS8228

R VS = Vin(p) = 150mV = 4.42Ω ⇒ 4.3Ω

IL 2 24mA 2

Voltage Input for Energy Calculation

The voltage channel input consisting of inputs VP and VN is differential, with VP connected to the tap of a

resistor divider circuit of the line voltage and VN connected to VSSA. For optimum operating conditions, the

input signal at VP should be set at 100mVp for the rated voltage condition.

The resistor values for an ideal voltage divider may be calculated as follows:

Assuming a Vmains of 230V (rms) → 325V (peak) and R2 = 470Ω (according to the voltage divider shown

below), the value of R1A+R1B may be calculated as follows:

Vmains

R1A+R1B

R2

Vin

R1A + R1B = R2 × (Vmains − Vin(P) ) = 470Ω × 325V − 100mV = 1.53MΩ

Vin(P)

100mV

thus R1A = 820kΩ and R1B = 750kΩ resistors may be selected.

The mains voltage is also sampled at 3.4956kHz, assuming that the recommended crystal oscillator frequency

of 3.5795MHz is used.

Digital Signal Processing Block (DSP)

The digital signal processing (DSP) block provides the signal processing required to ensure that the specified

measured accuracy is performed and that the microcontroller (MCU) is provided with the appropriate data and

protocol to perform all the required meter functions. For the description below, please refer to the following

block diagram (Figure 3).

The DSP makes allowance for phase correction of the two current channels (i1 and i2) within the Sinc3

decimation filters in the phase correction block. The applicable phase correction setting (pcorr_i1 or pcorr_i2)

is selected (sel_i), depending upon which current (i1 or i2) is being used for the power calculation.

The equalization filters on the voltage and current channels which may be by-passed (sel_equ), correct for the

attenuation introduced by the decimation filters at the edge of the input frequency band, while the high pass

filters, which may also be by-passed (sel_hp), eliminate any DC offsets introduced into the input channels.

Revision 3.0, 31-May-06

Page 18 of 123

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