CDB5333 查看數據表（PDF） - Cirrus Logic

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CDB5333

24-Bit, 96 kHz Stereo A/D Converter

Cirrus Logic 

CS5333

Left/Right Clock

MCLK Divide

Enable

Digital Interface

Format

Test Input

Positive Voltage

Reference

Reference Ground

Analog Inputs

Quiescent Voltage

Reset

7

8

9

10

11

12

13,14

15

16

LRCK (Input/Output) - The Left/Right clock determines which channel is currently being

output on the serial audio data line SDOUT. The frequency of the Left/Right clock must be

at the input sample rate. The required relationship between the Left/Right clock, serial

clock and serial data is defined by the DIF pin.

DIV (Input) - This pin serves different functions in Master and Slave modes.

In Master mode: When high, the chip will enter High Rate Mode; When this pin is low, the

chip will enter Base Rate Mode.

In Slave mode: When high, MCLK is divided internally by 2; When low, MCLK is not

changed.

DIF (Input) - The required relationship between the Left/Right clock, serial clock and serial

data is defined by the Digital Interface Format.

DIF

DESCRIPTION

0

I2S, up to 24-bit data

1

Left Justified, up to 24-bit data

Table 2. Digital Interface Format - DIF

TST (Input) - Must be connected directly to ground.

FILT+ (Output) - Positive reference for internal sampling circuits. An external capacitor is

required from FILT+ to ground, as shown in Figure 3. The recommended value will typi-

cally provide 60 dB of PSRR at 1 kHz and 40 dB of PSRR at 60 Hz. FILT+ is not intended

to supply external current. FILT+ has a typical source impedance of 250 kΩ and any cur-

rent drawn from this pin will alter device performance.

REF_GND (Input) - Ground reference for the internal sampling circuits. Must be con-

nected to ground.

AINR, AINL (Input) - The full scale analog input level is specified in the Analog Character-

istics specification table.

VQ (Output) - Filter connection for internal A/D converter quiescent reference voltage. A

capacitor must be connected from VQ to ground. VQ is not intended to supply external

current. VQ has a typical source impedance of 250 kΩ and any current drawn from this pin

will alter device performance.

RST (Input) - When low the device enters a low power mode and the part is in reset.

When high, the part returns to normal operation within 1024 LRCK cycles.

12

DS520PP1

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