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E28F016SA-150 查看數據表(PDF) - Intel

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E28F016SA-150 Datasheet PDF : 55 Pages
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28F016SA
E
4.0 BUS OPERATIONS, COMMANDS AND STATUS REGISTER DEFINITIONS
4.1 Bus Operations for Word-Wide Mode (BYTE# = VIH)
Mode
Notes RP# CE1# CE0# OE# WE# A1
Read
1,2,7
VIH
VIL
VIL
VIL
VIH
X
Output Disable
1,6,7
VIH
VIL
VIL
VIH
VIH
X
Standby
1,6,7
VIH
VIL
VIH
X
X
X
VIH
VIL
VIH
VIH
Deep Power-Down 1,3
VIL
X
X
X
X
X
Manufacturer ID
4
VIH
VIL
VIL
VIL
VIH
VIL
Device ID
4
VIH
VIL
VIL
VIL
VIH
VIH
Write
1,5,6
VIH
VIL
VIL
VIH
VIL
X
DQ0–15
DOUT
High Z
High Z
RY/BY#
X
X
X
High Z
VOH
0089H
VOH
66A0H
VOH
DIN
X
4.2 Bus Operations for Byte-Wide Mode (BYTE# = VIL)
Mode
Notes RP# CE1# CE0# OE# WE# A0 DQ0–7 RY/BY#
Read
1,2,7
VIH
VIL
VIL
VIL
VIH
X
DOUT
X
Output Disable
1,6,7
VIH
VIL
VIL
VIH
VIH
X High Z
X
Standby
1,6,7
VIH
VIL
VIH
X
X
X High Z
X
VIH
VIL
VIH
VIH
Deep Power-Down 1,3
VIL
X
X
X
X
X
High Z
VOH
Manufacturer ID
4
VIH
VIL
VIL
VIL
VIH
VIL
89H
VOH
Device ID
4
VIH
VIL
VIL
VIL
VIH
VIH
A0H
VOH
Write
1,5,6
VIH
VIL
VIL
VIH
VIL
X
DIN
X
NOTES:
1. X can be VIH or VIL for address or control pins except for RY/BY#, which is either VOL or VOH.
2. RY/BY# output is open drain. When the WSM is ready, block erase is suspended or the device is in deep power-down
mode. RY/BY# will be at VOH if it is tied to VCC through a resistor. RY/BY# at VOH is independent of OE# while a WSM
operation is in progress.
3. RP# at GND ± 0.2V ensures the lowest deep power-down current.
4. A0 and A1 at VIL provide manufacturer ID codes in x8 and x16 modes, respectively. A0 and A1 at VIH provide device ID
codes in x8 and x16 modes, respectively. All other addresses are set to zero.
5. Commands for different block erase operations, data program operations or lock-block operations can only be successfully
completed when VPP = VPPH.
6. While the WSM is running, RY/BY# in level-mode (default) stays at VOL until all operations are complete. RY/BY# goes to
VOH when the WSM is not busy or in erase suspend mode.
7. RY/BY# may be at VOL while the WSM is busy performing various operations; for example, a Status Register read during a
data program operation.
14

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