G570 查看數據表（PDF） - Global Mixed-mode Technology Inc
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G570 Datasheet PDF : 14 Pages
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Global Mixed-mode Technology Inc.
G570
Logic Input and Outputs
The serial interface consists of DATA, CLOCK, and
LATCH leads. The data is clocked in on the positive
leading edge of the clock (see Figure 2). The 9-bit (D0
through D8) serial data word is loaded during the positive
edge of the latch signal. The latch signal should occur
before the next positive leading edge of the block.
The shutdown bit of the data word places all VCC and VPP
outputs in a high-impedance state and reduces chip qui-
escent current to 2µA to conserve battery power.
The G570 serial interface is designed to be compatible
with serial-interface PCMCIA controllers and current
PCMCIA and Japan Electronic Industry Development
Association (JEIDA) standards.
An overcurrent output ( OC ) is provided to indicate an
overcurrent condition in any of the VCC or VPP outputs as
previously discussed.
G570
3.3V
3.3V
3.3V
5V
5V
5V
12V
12V
Supervisor
Controller
CPU
S1
S2
S3
cs
cs
S4
cs
S5
S6
cs
S7
S8
S9
See Note A
S10
S11
S12
See Note A
Internal
Current Monitor
RESET
RESET
DATA
CLOCK
LATCH
} Serial
Interface
OC
GND
Thermal
Card A
VPP1
VPP2
VCC
VCC
Card B
VCC
VCC
VPP1
VPP2
NOTE:MOSFET switches S9 and S12 have a back-gate diode from the source to the drain.
Unused switch inputs should never be grounded.
Figure 3 Internal Switching Matrix
Ver 1.0
Nov 09, 2000
TEL: 886-3-5788833
http://www.gmt.com.tw
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