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MAX1448 查看數據表(PDF) - Maxim Integrated

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MAX1448 Datasheet PDF : 21 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
10-Bit, 80Msps, Single 3.0V, Low-Power
ADC with Internal Reference
100 fIN = 25.12MHz AT -0.5dB FS
90
80
70
60
50
20
30
40
50
60
70
CLOCK DUTY CYCLE (%)
Figure 3a. Spurious Free Dynamic Range vs. Clock Duty
Cycle (Differential Input)
-50 fIN = 25.12MHz AT -0.5dB FS
-55
-60
-65
-70
-75
-80
-85
20
30
40
50
60
70
CLOCK DUTY CYCLE (%)
Figure 4a. Total Harmonic Distortion vs. Clock Duty Cycle
(Differential Input)
64 fIN = 25.12MHz AT -0.5dB FS
62
60
58
56
54
52
20
30
40
50
60
70
CLOCK DUTY CYCLE (%)
Figure 3b. Signal-to-Noise Ratio vs. Clock Duty Cycle
(Differential Input)
64 fIN = 25.12MHz AT -0.5dB FS
62
60
58
56
54
52
20
30
40
50
60
70
CLOCK DUTY CYCLE (%)
Figure 4b. Signal-to-Noise Plus Distortion vs. Clock Duty Cycle
(Differential Input)
OE
OUTPUT
DATA D9–D0
tENABLE
HIGH-Z
VALID DATA
tDISABLE
HIGH-Z
Figure 5. Output Enable Timing
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