MAX5072ETJ 查看數據表（PDF） - Maxim Integrated

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MAX5072ETJ

2.2MHz, Dual-Output Buck or Boost Converter with POR and Power-Fail Output

Maxim Integrated 

2.2MHz, Dual-Output Buck or Boost

Converter with POR and Power-Fail Output

PIN

28, 30

29

31, 32

EP

Pin Description (continued)

NAME

FUNCTION

PGND

SGND

Power Ground. Connect rectifier diode anode, input capacitor negative, output capacitor negative, and

VL bypass capacitor returns to PGND.

Signal Ground. Connect SGND to the exposed pad. Connect SGND and PGND together at a single point.

Connection to the Converter 2 Internal MOSFET Source.

SOURCE2 Buck Converter Operation—connect SOURCE2 to the switched side of the inductor as shown in Figure 1.

Boost Converter Operation—connect SOURCE2 to PGND (Figure 9).

SGND Exposed Paddle. Connect to SGND. Solder EP to the SGND plane for better thermal performance.

OUTPUT

2.5V/1A

PGOOD1

VL

SGND

VIN = 5.5V TO 23V

32 31 30 29 28 27 26 25

VL

CLOCK

OUT

SOURCE2 PGND SGND PGND SOURCE1 PGOOD1

1 CLKOUT

FSEL1 24

VL

2 BST2/VDD2 EP

SGND BST1/VDD1 23

3 DRAIN2

DRAIN1 22

ON

OFF

4 DRAIN2

5 EN2

6 FB2

MAX5072

DRAIN1 21

EN1 20

FB1 19

ON

OFF

VL

PFO

DYING GASP

7 COMP2

COMP1 18

8 PFO

RST 17

SYNC PFI OSC V+ VL VL BYPASS MR

9 10 11 12 13 14 15 16

VOUT1

SYSTEM

CLOCK

MANUAL

RESET

µP RESET INPUT

OUTPUT

3.3V/2A

PGND

SGND*

*CONNECT PGND AND SGND TOGETHER AT ONE POINT NEAR THE

RETURN TERMINALS OF THE V+ AND VL BYPASS CAPACITORS.

Figure 1. MAX5072 Dual Buck Regulator Application Circuit

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