MAX7033(2004) 查看數據表（PDF） - Maxim Integrated

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MAX7033
(Rev.:2004)

315MHz/433MHz ASK Superheterodyne Receiver with AGC Lock

Maxim Integrated 

315MHz/433MHz ASK Superheterodyne

Receiver with AGC Lock

filter output. Both comparator inputs are accessible off-

chip to allow for different methods of generating the

slicing threshold, which is applied to the second com-

parator input.

The suggested data slicer configuration uses a resistor

(R1) connected between DSN and DSP with a capaci-

tor (C4) from DSN to DGND (Figure 3). This configura-

tion averages the analog output of the filter and sets the

threshold to approximately 50% of that amplitude. With

this configuration, the threshold automatically adjusts

as the analog signal varies, minimizing the possibility

for errors in the digital data. The values of R1 and C4

affect how fast the threshold tracks to the analog ampli-

tude. Be sure to keep the corner frequency of the RC

circuit much lower than the lowest expected data rate.

Note that a long string of zeros or ones can cause the

threshold to drift. This configuration works best if a cod-

ing scheme, such as Manchester coding, which has an

equal number of zeros and ones, is used.

To prevent continuous toggling of DATAOUT in the

absence of an RF signal due to noise, add hysteresis to

the data slicer as shown in Figure 4.

Peak Detector

The peak-detector output (PDOUT), in conjunction with

an external RC filter, creates a DC output voltage equal

to the peak value of the data signal. The resistor pro-

vides a path for the capacitor to discharge, allowing the

peak detector to dynamically follow peak changes of

the data-filter output voltage. For faster data slicer

response, use the circuit shown in Figure 5.

Layout Considerations

A properly designed PC board is an essential part of

any RF/microwave circuit. On high-frequency inputs

and outputs, use controlled-impedance lines and keep

them as short as possible to minimize losses and radia-

tion. At high frequencies, trace lengths that are on the

order of λ/10 or longer act as antennas.

Keeping the traces short also reduces parasitic induc-

tance. Generally, 1in of a PC board trace adds about

20nH of parasitic inductance. The parasitic inductance

can have a dramatic effect on the effective inductance

of a passive component. For example, a 0.5in trace

connecting a 100nH inductor adds an extra 10nH of

inductance or 10%.

To reduce the parasitic inductance, use wider traces

and a solid ground or power plane below the signal

traces. Also, use low-inductance connections to ground

on all GND pins, and place decoupling capacitors

close to all VDD connections.

MAX7033

DATA

SLICER

25

DATAOUT

20

23

19

DSN

DSP

DFO

R1

C4

Figure 3. Generating Data Slicer Threshold

DATA

SLICER

MAX7033

25

DATAOUT

R1

23

20

19

DSP

DSN

R4

DFO

R3

R2 *OPTIONAL

C4

Figure 4. Generating Data Slicer Hysteresis

MAX7033

DATA

SLICER

25

DATAOUT

20

23 19

DSN

DSP DFO

25kΩ

47nF

26

PDOUT

Figure 5. Using PDOUT for Faster Startup

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