AM29LV017B-120EI 查看數據表（PDF） - Advanced Micro Devices

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AM29LV017B-120EI

16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory

Advanced Micro Devices 

PRELIMINARY

COMMON FLASH MEMORY INTERFACE

(CFI)

The Common Flash Interface (CFI) specification out-

lines device and host system software interrogation

handshake, which allows specific vendor-specified

software algorithms to be used for entire families of

devices. Software support can then be device-inde-

pendent, JEDEC ID-independent, and forward- and

backward-compatible for the specified flash device

families. Flash vendors can standardize their existing

interfaces for long-term compatibility.

This device enters the CFI Query mode when the

system writes the CFI Query command, 98h, to

address 55h, any time the device is ready to read array

data. The system can read CFI information at the

addresses given in Tables 4–7. To terminate reading

CFI data, the system must write the reset command.

The system can also write the CFI query command

when the device is in the autoselect mode. The device

enters the CFI query mode, and the system can read

CFI data at the addresses given in Tables 4–7. The

system must write the reset command to return the

device to the autoselect mode.

For further information, please refer to the CFI Specifi-

cation and CFI Publication 100, available via the World

Wide Web at http://www.amd.com/products/nvd/over-

view/cfi.html. Alternatively, contact an AMD represent-

ative for copies of these documents.

Addresses

10h

11h

12h

13h

14h

15h

16h

17h

18h

19h

1Ah

Addresses

1Bh

1Ch

1Dh

1Eh

1Fh

20h

21h

22h

23h

24h

25h

26h

Data

51h

52h

59h

02h

00h

40h

00h

00h

00h

00h

00h

Table 4. CFI Query Identification String

Description

Query Unique ASCII string “QRY”

Primary OEM Command Set

Address for Primary Extended Table

Alternate OEM Command Set (00h = none exists)

Address for Alternate OEM Extended Table (00h = none exists)

Data

27h

36h

00h

00h

04h

00h

0Ah

00h

05h

00h

04h

00h

Table 5. System Interface String

Description

VCC Min. (write/erase)

D7–D4: volt, D3–D0: 100 millivolt

VCC Max. (write/erase)

D7–D4: volt, D3–D0: 100 millivolt

VPP Min. voltage (00h = no VPP pin present)

VPP Max. voltage (00h = no VPP pin present)

Typical timeout per single byte/word write 2N µs

Typical timeout for Min. size buffer write 2N µs (00h = not supported)

Typical timeout per individual block erase 2N ms

Typical timeout for full chip erase 2N ms (00h = not supported)

Max. timeout for byte/word write 2N times typical

Max. timeout for buffer write 2N times typical

Max. timeout per individual block erase 2N times typical

Max. timeout for full chip erase 2N times typical (00h = not supported)

13

Am29LV017B

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