56F8123 查看數據表（PDF） - Motorola => Freescale
零件编号
产品描述 (功能)
生产厂家
56F8123 Datasheet PDF : 140 Pages
| |||
Signal Pins
Table 2-2 Signal and Package Information for the 64-Pin LQFP
Signal Name Pin No.
Type
State During
Reset
Signal Description
HOME0
49
Schmitt
Input
Input Home — Quadrature Decoder 0, HOME input
(TA3)
Schmitt
Input/
Output
Input TA3 — Timer A, Channel 3
(GPIOB4)
Schmitt
Input/
Output
Input
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
(prescaler_
clock)
Output
Output Clock Output - can be used to monitor the internal prescaler_clock
signal (see Part 6.5.7 CLKO Select Register, SIM_CLKOSR).
In the 56F8323, the default state after reset is HOME0.
SCLK0
In the 56F8123, the default state is not one of the functions offered
and must be reconfigured.
25
Schmitt Tri-stated SPI 0 Serial Clock — In the master mode, this pin serves as an
Input/
output, clocking slaved listeners. In slave mode, this pin serves as
Output
the data clock input. A Schmitt trigger input is used for noise
immunity.
(GPIOB3)
MOSI0
Schmitt
Input/
Output
Input
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is SCLK0.
24
Schmitt Tri-stated SPI 0 Master Out/Slave In — This serial data pin is an output from a
Input/
master device and an input to a slave device. The master device
Output
places data on the MOSI line a half-cycle before the clock edge the
slave device uses to latch the data.
(GPIOB2)
Schmitt
Input/
Output
Input
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is MOSI0.
56F8323 Technical Data, Rev. 11.0
Freescale Semiconductor
21
Preliminary
Share Link: 