MCM69F817ZP 查看數據表（PDF） - Motorola => Freescale

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MCM69F817ZP

256K x 18 Bit Flow–Through BurstRAM™ Synchronous Fast Static RAM

Motorola => Freescale 

NON–BURST SYNCHRONOUS OPERATION

Although this BurstRAM has been designed for PowerPC–

based and other high end MPU–based systems, these

SRAMs can be used in other high speed L2 cache or

memory applications that do not require the burst address

feature. Most L2 caches designed with a synchronous inter-

face can make use of the MCM69F817. The burst counter

feature of the BurstRAM can be disabled, and the SRAM can

be configured to act upon a continuous stream of addresses.

See Figure 5.

CONTROL PIN TIE VALUES (H ≥ VIH, L ≤ VIL)

Non–Burst

ADSP ADSC ADV SE1

LBO

Sync Non–Burst,

H

L

H

L

X

Flow–Through SRAM

NOTE: Although X is specified in the table as a don’t care, the pin

must be tied either high or low.

K

ADDR

A

B

C

D

E

F

G

H

W

G

DQ

Q(A)

Q(B)

Q(C)

Q(D)

D(E)

D(F)

D(G)

D(H)

READS

WRITES

Figure 5. Configured as Non–Burst Synchronous SRAM

Motorola Memory Prefix

Part Number

ORDERING INFORMATION

(Order by Full Part Number)

MCM

69F817

XX X X

Blank = Trays, R = Tape and Reel

Speed (6 = 6.0 ns, 6.5 = 6.5 ns, 7 = 7.0 ns)

Package (ZP = PBGA)

Full Part Numbers — MCM69F817ZP6

MCM69F817ZP6R

MCM69F817ZP6.5 MCM69F817ZP7

MCM69F817ZP6.5R MCM69F817ZP7R

MOTOROLA FAST SRAM

MCM69F817

15

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