MX88L284AEC 查看數據表（PDF） - Unspecified
零件编号
产品描述 (功能)
生产厂家
MX88L284AEC Datasheet PDF : 26 Pages
| |||
MX88L284AEC
Revision: 1.06A
Pin Description
CPU Interface Pins: (15 pins)
Pin Name
Drive I/O
No.
RSTZ#
I
193
AD[7:0]
4 mA
IO
185-178
AD7/SBCLK
185
AD6/SBDATA
184
AD5/SBCS#
183
CPUA15/BCS
I
187
ALE
WR#
RD#
BUSTYPE
IRQ
I
189
I
190
I
191
I
1
O
200
DESCRIPTION
System reset.
Multiplexed low_order address and data bus.
Serial Bus Clock
Serial Bus Data
Serial Bus CS# Low Active
high_order a15 address input, or BIU Valid
cycle.(for ISA bus debug)
Address Latch Enable for 8051 Bus.
Memory Write Strobe.
Memory Read Strobe
Bus type select
Interrupt request
DRAM Interface Pins: (52 pins) ** 3.3 Volt Interface ***
Pin Name
Drive I/O
No.
DESCRIPTION
MCLK
20 mA O
135
Memory clock
CKE
4 mA
O
150
Memory clock enable
RAS#
8 mA
O
153
Row address strobe
CAS#
8 mA
O
152
Column address strobe
WE#
8 mA
O
151
Write Enable
DQM[3:0]
8 mA
O
115,114, data mask byte enable (For SGRAM)
156,155
MA[10:0]
8 mA
O
137,139- Memory address
148
MD[31:0]
4 mA
IO
117-124, Memory data input/output
126-133,
159-166,
169,
171-177,
12
Share Link: 