T315XW01 查看數據表（PDF） - Unspecified
零件编号
产品描述 (功能)
生产厂家
T315XW01 Datasheet PDF : 22 Pages
| |||
3-3 Signal Timing Specifications
This is the signal timing required at the input of the User connector. All of the interface signal timing should be
satisfied with the following specifications for it’s proper operation.
* Timing Table
DE only Mode
Item
Clock
Freq.
Vsync
Freq.
Vertical
TTL
Active
Horizontal
TTL
Active
Symbol
Min.
Typ.
Max.
Unit
1/Tclk
---
81
90
MHz
1/Yv
---
60
---
Hz
774
1024
Th
Tvd
---
768
---
Th
1406
1606
2048
DCLK
Thd
---
1366
---
DCLK
*1) DCLK signal input must be valid while power supply is applied.
*2) Display position is specific by the rise of ENAB signal only.
Horizontal display position is specified by the falling edge of 1st DCLK right after the rise of
ENAB, is displayed on the left edge of the screen.
Vertical display position is specified by the rise of ENAB after a “Low” level period
equivalent to eight times of horizontal period. The 1st data corresponding to one horizontal
line after the rise the of ENAB is displayed at the top line of screen.
3.) If a period of ENAB “High” is less than 1366 DCLK or less than 768 lines, the rest of the
screen displays black.
4.) The display position does not fit to the screen if a period of ENAB “High” and the
effective data period do not synchronize with each other.
©Copyright AU Optronics, Inc.
January, 2003 All Rights Reserved.
T315XW01 V0 - Specs. Ver0.1
9/24
No Reproduction and Redistribution Allowed
Share Link: 