UPD17P709GC-3B9 查看數據表（PDF） - NEC => Renesas Technology

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UPD17P709GC-3B9

4-BIT SINGLE-CHIP MICROCONTROLLER WITH BUILT-IN HARDWARE DEDICATED TO DIGITAL TUNING SYSTEMS

NEC => Renesas Technology 

µPD17P709

1. PIN FUNCTIONS

1.1 NORMAL OPERATION MODE

Pin No.

1

41

42

2

3

4

5

Symbol

INT2

INT1

INT0

P1A3/INT4

P1A2/INT3

P1A1

P1A0/TM0G

6

P3A3

to

to

9

P3A0

10

P3B3

to

to

13

P3B0

14

P2A2

15

P2A1/FCG1

16

P2A0/FCG0

Function

Input for edge-detected vectored. Either a rising edge or falling edge

can be selected.

Output format

—

Input for port 1A, external interrupt request signal, and event signal

• P1A3-P1A0

• 4-bit input port

• INT4, INT3

• Edge-detected vectored interrupt

• TM0G

• Gate input for 8-bit timer 0

Power-on reset

Input

(P1A3-P1A0)

When reset

WDT&SP reset

Input

(P1A3-P1A0)

CE reset

Held

When the clock

is stopped

Held

4-bit I/O port.

Input/output can be specified in 4-bit units.

When reset

Power-on reset WDT&SP reset

CE reset

Input

Input

Held

4-bit I/O port.

Input/output can be specified in 4-bit units.

When the clock

is stopped

Held

Power-on reset

Input

When reset

WDT&SP reset

Input

CE reset

Held

When the clock

is stopped

Held

Input for port 2A and external gate counter

• P2A2-P2A0

• 3-bit I/O port

• Input/output can be specified bit by bit.

• FCG1, FCG0

• External gate counter input

Power-on reset

Input

(P2A2-P2A0)

When reset

WDT&SP reset

Input

(P2A2-P2A0)

CE reset

When the clock

is stopped

Held

Held

(P2A2-P2A0) (P2A2-P2A0)

—

CMOS push-pull

CMOS push-pull

CMOS push-pull

9

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