INTEL82801 查看數據表（PDF） - Intel

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INTEL82801

Intel® 82801AA (ICH) and Intel® 82801AB (ICH0) I/O Controller Hub

Intel 

Register Bit Index

Single or Cascade (SNGL) 9-30

SIRQEN 9-8

SIRQMD 9-8

SIRQSZ 9-8

Slave Identification Code 9-31

SLP_EN 9-55

SLP_TYP 9-55

SMB_CMD 12-6

SMB_SMI_EN 12-4

SMB_WAK_EN 9-58

SMB_WAK_STS 9-58

SMBALERT_STS 12-5

SMI at End of Pass-through Enable

(SMIATENDPS) 11-6

SMI Caused by End of Pass-through

(SMIBYENDPS) 11-5

SMI Caused by Port 60 Read

(TRAPBY60R) 11-6

SMI Caused by Port 60 Write

(TRAPBY60W) 11-6

SMI Caused by Port 64 Read

(TRAPBY64R) 11-6

SMI Caused by Port 64 Write

(TRAPBY64W) 11-6

SMI Caused by USB Interrupt

(SMIBYUSB) 11-5

SMI on Port 60 Reads Enable (60REN)

11-6

SMI on Port 60 Writes Enable

(60WEN) 11-6

SMI on Port 64 Reads Enable (64REN)

11-6

SMI on Port 64 Writes Enable

(64WEN) 11-6

SMI on USB IRQ (USBSMIEN) 11-6

SOF Timing Value 11-13

Software Debug (SWDBG) 11-8

Speaker Data Enable

(SPKR_DAT_EN) 9-45

Special Fully Nested Mode (SFNM)

9-32

Special Mask Mode (SMM) 9-33

Square Wave Enable (SQWE) 9-43

SSE 9-3

STA 9-3

STA (Signaled Target-Abort Status)

14-3

START 12-6

Start/Stop Bus Master (START) 10-9

Sub Class Code 10-3, 11-3, 12-3, 13-4

Sub Class Code Value 14-4

Sub-Class Code 9-4

Sub-Class Code. 8-4

Subordinate Bus Number. 8-5

Subsystem ID Value 13-6, 14-6

Subsystem Vendor ID Value 13-6, 14-5

Suspend 11-13

SW_TCO_SMI 9-67

SWSMI_TMR_EN 9-60

SWSMI_TMR_STS 9-61

System Reset (SYS_RST) 9-46

T

TCO_EN 9-60

TCO_INT_STS 9-67

TCO_IRQ_EN 9-6

TCO_IRQ_SEL 9-6

TCO_STS 9-61

TCOSCI_EN 9-58

TCOSCI_STS 9-58

THRM#_POL 9-59

THRM_DTY 9-56

THRM_EN 9-59

THRM_STS 9-58

THRMOR_STS 9-58

THT_EN 9-56

THTL_DTY 9-56

THTL_STS 9-56

TIMEOUT 9-66

Timeout/CRC Interrupt Enable 11-11

Timer Counter 2 Enable

(TIM_CNT2_EN) 9-45

Timer Counter 2 OUT Status

(TMR2_OUT_STS) 9-45

TMR_VAL 9-55

TMROF_EN 9-54

TMROF_STS 9-54

Trigger Mode 9-39

82801AA and 82801AB Datasheet

B-7

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