LCMXO1200E-3TN100CES 查看數據表（PDF） - Lattice Semiconductor

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LCMXO1200E-3TN100CES

MachXO Family Data Sheet

Lattice Semiconductor 

Lattice Semiconductor

Architecture

MachXO Family Data Sheet

Table 2-10. Supported Output Standards

Output Standard

Drive

Single-ended Interfaces

LVTTL

4mA, 8mA, 12mA, 16mA

LVCMOS33

4mA, 8mA, 12mA, 14mA

LVCMOS25

4mA, 8mA, 12mA, 14mA

LVCMOS18

4mA, 8mA, 12mA, 14mA

LVCMOS15

4mA, 8mA

LVCMOS12

2mA, 6mA

LVCMOS33, Open Drain

4mA, 8mA, 12mA, 14mA

LVCMOS25, Open Drain

4mA, 8mA, 12mA, 14mA

LVCMOS18, Open Drain

4mA, 8mA, 12mA, 14mA

LVCMOS15, Open Drain

4mA, 8mA

LVCMOS12, Open Drain

2mA, 6mA

PCI333

N/A

Differential Interfaces

LVDS1, 2

N/A

BLVDS, RSDS2

N/A

LVPECL2

N/A

1. MachXO1200 and MachXO2280 devices have dedicated LVDS buffers.

2. These interfaces can be emulated with external resistors in all devices.

3. Top Banks of MachXO1200 and MachXO2280 devices only.

VCCIO (Typ.)

3.3

3.3

2.5

1.8

1.5

1.2

—

—

—

—

—

3.3

2.5

2.5

3.3

sysIO Buffer Banks

The number of Banks vary between the devices of this family. Eight Banks surround the two larger devices, the

MachXO1200 and MachXO2280 (two Banks per side). The MachXO640 has four Banks (one Bank per side). The

smallest member of this family, the MachXO256, has only two Banks.

Each sysIO buffer Bank is capable of supporting multiple I/O standards. Each Bank has its own I/O supply voltage

(VCCIO) which allows it to be completely independent from the other Banks. Figure 2-18, Figure 2-18, Figure 2-20

and Figure 2-21 shows the sysIO Banks and their associated supplies for all devices.

2-18

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