Dynamically Adjustable, Synchronous
Step-Down Controller for Notebook CPUs
This can be achieved in several ways, including the fol-
lowing two (Figure 10). By using low-impedance pull-up
resistors with the CPU’s VID pins, each pin provides the
low impedance needed for the mux to correctly inter-
pret the B-mode setting. Unfortunately, the low resis-
tances cause several mA additional quiescent current
for each of the CPU’s grounded VID pins. This quies-
cent current can be avoided by taking advantage of the
fact that D0–D4 need only appear low impedance
briefly, not necessarily on a continuous DC basis. High-
impedance pull-ups can also be used if they are
bypassed with a large enough capacitance to make
them appear low impedance for the 4µs sampling inter-
val. As noted in Figure 10, 4.7nF capacitors allow the
inputs to appear low impedance even though they are
pulled up with 1MΩ resistors.
3V TO 5.5V
A-MODE VID =
01101 → 1.35V
D4
100kΩ
D3
D2
D1
D0
B-MODE VID =
01000 → 1.60V
MAX1717
A/B
A/B = LOW = 1.60V
A/B = HIGH = 1.35V
Figure 7. Using the Internal Mux with Hard-Wired A-Mode and
B-Mode DAC Codes
3V TO 5.5V
100kΩ
+5V
VCC
MAX1717
40kΩ 40kΩ 40kΩ 40kΩ 40kΩ
D4
D3
D2
B-DATA
LATCH
D1
D0
8kΩ 8kΩ 8kΩ 8kΩ 8kΩ
GND
Figure 8. Internal Mux B-Mode Data Test and Latch
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