OV7620 查看數據表（PDF） - Unspecified

零件编号

产品描述 (功能)

生产厂家

OV7620

SINGLE-CHIP CMOS VGA COLOR DIGITAL CAMERA

Unspecified 

Preliminary Company Confidential

OV7620 Product Specifications - Rev. 1.2 (5/13/00)

OMNIVISION TECHNOLOGIES INC.

PCLK

HREF

Y<7:0>

UV<7:0>

PCLK

HREF

Tclk

Tsu

Thd

10

Y

Y

10

80

U

V

80

repeat for all data bytes

Pixel Data 16 bit Timing

Use PCLK rising edge latch data bus

Tclk

Tsu

Thd

Y<7:0>

10 80 10 U

Y

V

Y 80 10

repeat for all data bytes

Pixel Data 8 bit Timing

Use PCLK rising edge latch data bus

FIG 1.2 Pixel Data Bus (YUV Output)

Note: Tclk is pixel clock period. When OV7620 system clock is 27MHz, Tclk=74ns for 16 Bit out-

put; Tclk=37ns for 8 Bit output. Tsu is HREF set-up time, maximum is 15 ns; Thd is HREF hold

time, maximum is 15 ns.

12

Share Link: