Data Sheet
512 Kbit SPI Serial Flash
SST25VF512
CE#
SCK
SO
SI
HOLD#
THHH
THLS
THZ
THLH
THHS
TLZ
FIGURE 17: HOLD TIMING DIAGRAM
VDD
VDD Max
Chip selection is not allowed.
All commands are rejected by the device.
VDD Min
TPU-READ
TPU-WRITE
Device fully accessible
1192 F43.1
FIGURE 18: POWER-UP TIMING DIAGRAM
©2005 Silicon Storage Technology, Inc.
18
Time
1192 F45.0
S71192-08-000
11/05