LT3669 查看數據表（PDF） - Linear Technology

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LT3669

IO-Link Transceiver with Integrated Step-Down Regulator and LDO

Linear Technology 

LT3669/LT3669-2

PIN FUNCTIONS

SC1 (Pin 1): CQ1 Short-Circuit Detect Open-Collector

Output. SC1 pulls low when a short-circuit is detected on

the CQ1 driver output or after a thermal shutdown event.

Use a 100k pull-up resistor to the µC’s supply. Lowpass

filter this signal before further processing. See the Ap-

plications Information section.

SC2 (Pin 2): Q2 Short-Circuit Detect Open-Collector

Output. SC2 pulls low when a short-circuit is detected on

the Q2 driver output or after a thermal shutdown event.

Use a 100k pull-up resistor to the µC’s supply. Lowpass

filter this signal before further processing. See the Ap-

plications Information section.

WAKE (Pin 3): Wake-up Detect Open-Collector Output.

WAKE pulls low when driver 1 detects a wake-up pulse

longer than 75µs at the CQ1 pin (indicating that a data

transmission is beginning). WAKE returns to high imped-

ance after the handshaking sequence of setting TXEN1 low

and then toggling TXD1 or after an internal reset event.

Use a 10k pull-up resistor to the µC’s supply.

RXD1 (Pin 4): CQ1 Receiver Output, Open Collector. Use

a pull-up resistor of 10k or less for improved data perfor-

mance in COM3. RXD1 polarity is inverted with respect

to the line data CQ1.

TXEN1 (Pin 5): CQ1 Driver Enable. The TXEN1 pin enables

the line data CQ1 driver in push-pull mode when pulled

high. To use the driver in open-collector mode, tie TXD1

high (for pull-down mode) or low (for pull-up mode) and

drive the data signal into the TXEN1 pin.

TXD1 (Pin 6): CQ1 Driver Input. The polarity of the driver

output is inverted with respect to TXD1.

TXEN2 (Pin 7): Q2 Driver Enable. The TXEN2 pin enables

the line data Q2 driver in push-pull mode when pulled

high. To use the driver in open-collector mode, tie TXD2

high (for pull-down mode) or low (for pull-up mode) and

drive the data signal into the TXEN2 pin.

TXD2 (Pin 8): Q2 Driver Input. The polarity of the driver

output is inverted with respect to TXD2.

Q2 (Pin 9): Q2 Driver Output. The driver output polarity

is inverted with respect to the driver input TXD2. Con-

nect a capacitor (typically 470pF) from Q2 to ground for

improved performance.

CQ1 (Pin 10): CQ1 Driver Output and Receiver Input. The

driver output polarity is inverted with respect to the driver

input TXD1. Tie directly to the industrial line data terminal.

Connect a capacitor (typically 470pF) from CQ1 to ground

for improved performance.

L+ (Pin 11): Power Supply Input and Anode of Internal

Reverse Polarity Protection Diode. Connect to the industrial

line supply terminal. The L+ pin supplies current to the

LT3669’s internal circuitry and must be locally bypassed

with at least 4.7µF.

EN/UVLO (Pin 12): The EN/UVLO pin puts the LT3669 in

shutdown mode. Pull the pin below 0.4V to shut down

the LT3669. The 1.5V threshold functions as an accurate

undervoltage lockout (UVLO), preventing the regulators

and transceiver from operating until the input voltage has

reached the programmed level.

DIO (Pin 13): Cathode of Internal Reverse Polarity Pro-

tection Diode. Do not use a bypass capacitor at DIO. An

external diode from L+ to DIO can be used to improve

efficiency. In this case only, a bypass capacitor is al-

lowed at DIO. The external diode must be chosen with

a reverse-breakdown voltage higher than the expected

reverse-polarity condition, and it must be robust enough

to withstand the inrush current of hot plugging.

GND (Pin 14, LT3669): Ground in LT3669. Leave this pin

floating or tie the pin directly to the ground plane and the

industrial line ground terminal L–.

DA (Pin 14, LT3669-2): Diode Anode in LT3669-2. Connect

the anode of the external catch diode (D1 in LT3669-2's

Block Diagram) to this pin. Internal circuitry senses the

current through the catch diode providing frequency

foldback in extreme situations.

SW (Pin 15): Output of the Internal NPN Power Switch.

Connect this pin to the inductor and boost capacitor.

BST (Pin 16): The BST pin provides drive voltage higher

than the input voltage to the internal NPN power switch.

Connect a capacitor (typically 0.22µF) between BST

and SW.

BD (Pin 17): An integrated Schottky diode is connected

from BD to BST, providing the charging path for the

boost capacitor. Connect to the output of the switching

regulator.

3669fa

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For more information www.linear.com/LT3669

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