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ARM9TDMI 查看數據表(PDF) - Unspecified

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ARM9TDMI
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ARM9TDMI Datasheet PDF : 158 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Contents
Chapter 4
Chapter 5
Chapter 6
Chapter 7
Chapter 8
Appendix A
ARM9TDMI Coprocessor Interface
4.1 About the coprocessor interface ................................................................. 4-2
4.2 LDC/STC .................................................................................................... 4-3
4.3 MCR/MRC .................................................................................................. 4-9
4.4 Interlocked MCR ....................................................................................... 4-11
4.5 CDP .......................................................................................................... 4-13
4.6 Privileged instructions ............................................................................... 4-15
4.7 Busy-waiting and interrupts ...................................................................... 4-17
4.8 Coprocessor 15 MCRs ............................................................................. 4-19
Debug Support
5.1 About debug ............................................................................................... 5-2
5.2 Debug systems ........................................................................................... 5-3
5.3 Debug interface signals .............................................................................. 5-5
5.4 Scan chains and JTAG interface .............................................................. 5-11
5.5 The JTAG state machine .......................................................................... 5-12
5.6 Test data registers .................................................................................... 5-18
5.7 ARM9TDMI core clocks ............................................................................ 5-24
5.8 Clock switching during debug ................................................................... 5-25
5.9 Clock switching during test ....................................................................... 5-26
5.10 Determining the core state and system state ........................................... 5-27
5.11 Exit from debug state ................................................................................ 5-30
5.12 The behavior of the program counter during debug ................................. 5-33
5.13 EmbeddedICE macrocell .......................................................................... 5-36
5.14 Vector catching ......................................................................................... 5-45
5.15 Single stepping ......................................................................................... 5-46
5.16 Debug communications channel .............................................................. 5-47
Test Issues
6.1 About testing ............................................................................................... 6-2
6.2 Scan chain 0 bit order ................................................................................. 6-3
Instruction Cycle Summary and Interlocks
7.1 Instruction cycle times ................................................................................ 7-2
7.2 Interlocks .................................................................................................... 7-5
ARM9TDMI AC Characteristics
8.1 ARM9TDMI timing diagrams ...................................................................... 8-2
8.2 ARM9TDMI timing parameters ................................................................. 8-14
ARM9TDMI Signal Descriptions
A.1 Instruction memory interface signals .......................................................... A-2
A.2 Data memory interface signals ................................................................... A-3
A.3 Coprocessor interface signals .................................................................... A-5
A.4 JTAG and TAP controller signals ............................................................... A-6
A.5 Debug signals ............................................................................................. A-8
iv
Copyright © 2000 ARM Limited. All rights reserved.
ARM DDI 0180A

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