28F016SV 查看數據表（PDF） - Intel
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28F016SV Datasheet PDF : 63 Pages
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28F016SV FlashFile™ MEMORY
4.4 28F016SV—Performance Enhancement Command Bus Definitions
Command
Mode
Notes
First Bus Cycle
Oper Addr Data(13)
Second Bus Cycle
Oper Addr Data(13)
Third Bus Cycle
Oper Addr Data
Read Extended
Status Register
1
Write X xx71H Read RA GSRD
BSRD
Page Buffer Swap
7
Write X xx72H
Read Page Buffer
Write X xx75H Read PBA
PD
Single Load to Page
Buffer
Write X xx74H Write PBA
PD
Sequential Load to
Page Buffer
x8 4,6,10 Write X xxE0H Write X
x16 4,5,6,10 Write X xxE0H Write X
BCL Write X
WCL Write X
BCH
WCH
Page Buffer Write to x8 3,4,9,10 Write X xx0CH Write A0 BC(L,H) Write PA BC(H,L)
Flash
x16 4,5,10 Write X xx0CH Write X
WCL Write PA
WCH
Two-Byte Program
x8
Lock Block/Confirm
3
Write X xxFBH Write A0 WD(L,H) Write PA WD(H,L)
Write X xx77H Write BA xxD0H
Upload Status
Bits/Confirm
2
Write X xx97H Write X
xxD0H
Upload Device
Information/Confirm
11 Write X xx99H Write X
xxD0H
Erase All Unlocked
Blocks/Confirm
Write X xxA7H Write X
xxD0H
RY/BY# Enable to
Level-Mode
8
Write X xx96H Write X
xx01H
RY/BY#
Pulse-On-Write
8
Write X xx96H Write X
xx02H
RY/BY#
Pulse-On-Erase
8
Write X xx96H Write X
xx03H
RY/BY# Disable
8
Write X xx96H Write X
xx04H
RY/BY# Pulse-On-
Write/Erase
8
Write X xx96H Write X
xx05H
Sleep
12 Write X xxF0H
Abort
Write X xx80H
ADDRESS
BA = Block Address
PBA = Page Buffer Address
RA = Extended Register Address
PA = Program Address
X = Don’t Care
DATA
AD = Array Data
PD = Page Buffer Data
BSRD = BSR Data
GSRD = GSR Data
WC (L,H) = Word Count (Low, High)
BC (L,H) = Byte Count (Low, High)
WD (L,H) = Write Data (Low, High)
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