AS6UA5128-BC 查看數據表（PDF） - Alliance Semiconductor

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AS6UA5128-BC

2.3V to 3.6V 512K×8 Intelliwatt low-power CMOS SRAM

Alliance Semiconductor 

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Write cycle (over the operating range)

–55

Parameter

Symbol Min Max

Write cycle time

tWC

55

–

Chip select to write end

tCW

40

–

Address setup to write end

tAW

40

–

Address setup time

tAS

0

–

Write pulse width

tWP

35

–

Write recovery time

tWR

0

–

Address hold from end of write tAH

0

–

Data valid to write end

tDW

25

–

Data hold time

tDH

0

–

Write enable to output in high Z tWZ

0

20

Output active from write end

tOW

5

–

–70

Min Max Unit

70

–

ns

60

–

ns

60

–

ns

0

–

ns

55

–

ns

0

–

ns

0

–

ns

30

–

ns

0

–

ns

0

20

ns

5

–

ns

Write waveform 1 (WE controlled)

tWC

tAW

Address

WE

DIN

DOUT

tWP

tAS

tWZ

tWR

tAH

tDW

Data valid

tDH

tOW

Write waveform 2 (CS controlled)

tWC

tAW

Address

CS

WE

DIN

DOUT

tAS

tCW

tWP

tWZ

tDW

Data valid

tAH

tWR

tDH

AS6UA5128

Notes

12

12

4, 5

4, 5

4, 5

9/21/01; v.1.2

Alliance Semiconductor

P. 5 of 9

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