VSC8161 查看數據表（PDF） - Vitesse Semiconductor

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VSC8161

2.488Gb/s SONET / SDH 16:1 Mux with Clock Generator and Laser Driver

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

Advance Product Information

VSC8161

2.488Gb/s SONET / SDH

16:1 Mux with Clock Generator and Laser Driver

Table 2: Low-speed Inputs and Outputs

Parameter

VIH

VIL

∆DIFFIN

∆DIFFOUT

∆CMOUT

Description

Input HIGH voltage

Input LOW voltage

Differential input voltage

swing

Differential output voltage

swing

Differential common mode

output voltage

Min

-1040

VTT

0.400

0.600

Typ

-

-

0.800

-

VCC -

1.2V

Max

-600

-1600

1.4

-

Units

mV

mV

V

Conditions

Guaranteed HIGH

signal for all inputs

Guaranteed LOW

signal for all inputs

AC coupled

V

See Figure 7

See Figure 7

Figure 7: Differential Output Termination Methods

VSC8161

To

Receiver

50Ω

50Ω

GND

VSC8161

To

Receiver

100Ω

a) Two 50Ω resistors to a common AC ground

b) 100Ω pad-pad termination

Termination Method (a) is preferred for improved noise immunity.

Table 3: Clock Multiplier Unit Performance

Name

RCd

RCf

∆fRC

tjitter

gJT

f-3dB

Description

Reference clock duty cycle

Reference clock frequency

Reference clock frequency range

Jitter generation (12 KHz to 20 MHz)

Jitter transfer peaking

Jitter transfer -3dB bandwidth

Min

Typ

Max

45

55

155.52

-100

+100

0.01

1.0

1800

Units

%

MHz

ppm

UIRMS

dB

kHz

G52208-0, Rev.2.1

8/28/98

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