MC34717(2007) 查看數據表（PDF） - Freescale Semiconductor

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MC34717
(Rev.:2007)

5.0 A 1.0 MHz Fully Integrated Dual Switch-Mode Power Supply

Freescale Semiconductor 

TYPICAL APPLICATIONS

OPERATIONAL MODES

SELECTING INDUCTOR

The Inductor calculation process is the same for both

Channels. The equation is the following:

L

=

D'MAX ∗T

∗

(VOUT

+

I OUT

*(Rds(on) _ ls

∆IOUT

+

r

_

w))

D'MAX

= 1− VOUT

Vin _ max

Maximum Off Time Percentage

T

Switching Period

Rds(on) _ls

Drain – to – Source

Resistance of FET

r_w

∆IOUT

Winding Resistance of Inductor

Output Current Ripple

SELECTING THE OUTPUT FILTER CAPACITOR

The following considerations are most important for the

output capacitor, and not the actual Farad value: the physical

size, the ESR of the capacitor, and the voltage rating.

Calculate the minimum output capacitor using the

following formula:

Co = IOUT * dt _ I _ rise

TR _V _ dip

Transient Response percentage:

TR_%

Maximum Transient Voltage:

TR_V_dip = VOUT*TR_%

Maximum Current Step:

∆Iout _ step = (Vin _ min− Vout) * D _ max

Fsw * L

Inductor Current Rise Time:

dt _ I _ rise = T * I OUT

∆I _ step

OUT

The following formula is helpful to find the maximum

allowed ESR.

ESRmax

=

∆VOUT * Fsw * L

VOUT (1 − D min)

The effects of the ESR is often neglected by the design-

ers and may present a hidden danger to the ultimate supply

stability. Poor quality capacitors have a widely disparate

ESR value, which can make the closed loop response incon-

sistent.

BOOTSTRAP CAPACITOR

The bootstrap capacitor is needed to supply the gate

voltage for the high side MOSFET. This N-Channel MOSFET

needs a voltage difference between its gate and source to be

able to turn on. The high side MOSFET source is the SW

node, so it is not at ground and it is floating and shifting in

voltage. We cannot just apply a voltage directly to the gate of

the high side that is referenced to ground. We need a voltage

referenced to the SW node. This is why the bootstrap

capacitor is needed. This capacitor charges during the high

side off time. The low side will be on during that time. The SW

node and the bottom of the bootstrap capacitor will be

connected to ground, and the top of the capacitor will be

connected to a voltage source. The capacitor will charge up

to that voltage source (for example 5V). Now when the low

side MOSFET switches off and the high side MOSFET

switches on, the SW nodes will rise to VIN, and the voltage on

the boot pin will be VCAP + VIN. The gate of the high side will

have VCAP across it and it will be able to stay enhanced. A

0.1µF capacitor is a good value for this bootstrap

element.

TYPE III COMPENSATION NETWORK

Power supplies are desired to offer accurate and tight

regulation output voltages. A high DC gain is required to

accomplish this, but with high gain comes the possibility of

instability. The purpose of adding compensation to the

internal error amplifier is to counteract some of the gains and

phases contained in the control-to-output transfer function

that could jeopardized the stability of the power supply. The

Type III compensation network used for the 34717 comprises

two poles (one integrator and one high frequency to cancel

the zero generated from the ESR of the output capacitor) and

two zeros to cancel the two poles generated from the LC filter

as shown in Figure 9.

Analog Integrated Circuit Device Data

Freescale Semiconductor

34717

19

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